During my debug of the 8B, over the last couple of days, I improved my understanding of the data display on the SCELBI front panel. Though it is clear from the block diagram, some things just don’t sink into my brain without some additional lessons, usually learned the hard way.

The data display simply shows the contents of the memory location that is currently being addressed. I already knew that when you stop or step the SCELBI, it stops after setting up the address bus, but before executing the next cycle. In 8008 terms, this is at CPU state T1. The two status bits on the front panel are simply the two high bits of the high byte of the address byte. These two bits are not actually address bits, but known as the cycle control decodes, which is why the 8008 only has 16K of address space and not 64K. Another fact to consider is that both 1101 and 2102 memory chips have different input and output data lines.

The interesting thing that is a result of these design decisions, is that you can do simple memory tests from the front panel by writing a memory location, without even reading it. The data you write should show up on the front panel, without the need to even execute a read instruction. If you have a write failure, you will immediately see that the data you thought that you wrote is being displayed incorrectly and therefore has been written to memory incorrectly.

One other thing, without memory in the system, the data display will always show up as all ones. You can still jam instructions into the CPU, but you will not be able to use the data display as an aide to troubleshooting.