General Purpose Prototype Areas

The following image highlights the three general purpose proto areas.

Proto Area A

This area is located on the end of the SUPERPROTO board closest to the back of the computer, across from the 5 VOLT and GROUND vias. This area is labeled "PA". The area is oriented horizontally with 15 rows of between 5 and 8 pads. The rows of pads are split into two groups that are connected by copper traces. On each horizontal row, the set of 3 pads toward the edge of the SUPERPROTO board are connected with traces. The other set of between 2 and 5 pads on that row are also connected. These two groups are not connected together, allowing a DIP chip for other device to straddle the center gap.

This area can be used for a 300 mil wide dip chip, discrete components or a dual "KK" style header used to connect the SUPERPROTO to an off board devices. Examples of using the KK header approach to connecting remote devices was used extensively during the "old" days on such popular interfaces as the Disk ][ and Super Serial Card.

Proto Area B

This area is located on the top of the SUPERPROTO board closest to the back of the computer, across from the 22V10 GAL chip. This area is labeled "PB". The area is oriented vertically with 27 columns of between 5 and 8 pads. The columns of pads are split into two groups that are connected by copper traces. On each vertical row, the set of 3 pads toward the top of the SUPERPROTO board are connected with traces. The other set of between 2 and 5 pads on that column are also connected. These two groups of pads are not connected together, allowing a DIP chip for other device to straddle the center gap.

This area can be used for a 300 mil wide dip chip, discrete components or "KK" style headers.

Proto Area C

This area is located on the end of the SUPERPROTO board closest to the front of the computer, spanning the area between the 6522A and the IC proto area. This area is labeled "PC". The area is oriented vertically with 45 columns of 7 pads. The columns of pads are split into two groups that are connected by copper traces. On each vertical row, the set of 5 pads toward the top of the SUPERPROTO board are connected with traces. The other set of 2 pads on that column are also connected. These two groups are not connected together, allowing a DIP chip for other device to straddle the center gap.

This area has some unique features since if, a 6522A VIA is populated on the board, the bottom sets of pads are used as the mounting point for pins 1 through 20 of the VIA chip. In addition, the lower 2 pads on rows 21 and 22 are connected by traces to where pins 39 and 40 of the 6522A VIA are mounted. This allows easy access to to the CA2 and CA1 pins of the VIA from the proto area.

If the 6522A VIA is populated, access to port A and B pins are by connecting to the second row of pads in this area.

This area can also accommodate the bottom half of a 600 mil wide dip chip, even if the 6522A is populated. The bottom row of pins are mounted in the row of pads, forth from the bottom. The top row of pins will line up with the row of pads, second from the bottom in the IC proto area.

This area can be used for mounting the 6522A VIA, 300 mil wide dip chips, 600 mil wide dip chips, discrete components or "KK" style headers.